1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to a driving circuit of a liquid crystal display (LCD) device and a method for driving the same.
2. Discussion of the Related Art
Demands for various display devices have increased as the information society has developed. Accordingly, many efforts have been made to research and develop various types of flat display devices, such as liquid crystal display (LCD), plasma display panel (PDP), electroluminescent display (ELD), and vacuum fluorescent display (VFD). Some types of flat display devices have already been utilized in a variety of different applications. Among the various flat display devices, liquid crystal display (LCD) devices have been most widely used due to the advantageous characteristics of slim profile, light weight, and low power consumption. LCD devices have been provided as a substitute for a cathode ray tube (CRT) in many applications. In addition, mobile type LCD devices, such as a display for a notebook computer, have been developed. Further, LCD devices can be used as computer monitors, televisions or other types of equipment that display video.
In general, an LCD device includes an LCD panel to display video signals, and an external driving circuit to supply driving signals to the LCD panel. An LCD panel includes first and second transparent substrates (i.e., glass substrates) bonded to each other with a predetermined gap therebetween. A liquid crystal material is injected into the gap between the first and second substrates. More particularly, the first substrate includes a plurality of gate lines and data lines that cross each other defining pixel regions, pixel electrodes that are in each of the respective pixel regions, and thin film transistors that are each located at the respective crossings of the gate lines and data lines. The thin film transistors control the application of video signals from the data lines to the respective pixel electrodes in accordance with gate signals of the gate lines.
FIG. 1 is a block diagram of a related art LCD device. As shown in FIG. 1, the related art LCD device includes a data driver 11b, a gate driver 11a, a timing controller 13, a power supply part 14, a gamma reference voltage part 15, a DC/DC converter 16, a backlight 18, and an inverter 19. The data driver 11b inputs a data signal to each data line D of an LCD panel 11 while the gate driver 11a supplies a gate driving pulse to each gate line G of the LCD panel 11. The timing controller 13 receives display data R/G/B, vertical and horizontal synchronous signals Vsync and Hsync, a clock signal DCLK and a control signal DTEN from a driving system 17 of the LCD panel 11, and formats the display data, the clock signal and the control signal at a timing suitable for restoring a picture image by the gate driver 11a and the data driver 11b of the LCD panel 11. The power supply part 14 supplies a voltage to the LCD panel 11 and to the other components. The gamma reference voltage part 15 also receives power from the power supply part 14 and provides a reference voltage required when digital data inputted from the data driver 11b is converted to analog data. The DC/DC converter 16 outputs a constant voltage VDD, a gate high voltage VGH, a gate low voltage VGL, a reference voltage Vref, and a common voltage Vcom for the LCD panel 11 by using the voltage output from the power supply part 14. The backlight 18 provides a light source for the LCD panel 11 while the inverter 19 drives the backlight 18.
The gamma reference voltage circuit of the gamma reference voltage part 15 referred to in FIG. 1 will be described with reference to FIG. 2. FIG. 2 is a block diagram illustrating a gamma reference voltage circuit according to the related art. The gamma reference voltage circuit enhances the picture quality of the LCD device. As shown in FIG. 2, the gamma reference voltage circuit includes a power voltage Vdd 201, a gamma register 202 dividing the power voltage Vdd 201 to output a plurality of gamma reference voltages GMA1 to GMA10, and a gamma buffer 203 for stably amplifying and outputting the plurality of gamma reference voltages GMA1 to GMA10.
An operation of the gamma reference voltage circuit according to the related art will be described in reference to FIG. 2. As shown in FIG. 2, the gamma register 202 divides the power voltage Vdd 201 by a plurality of resistors R1 to RIO, and outputs the plurality of gamma reference voltages GMA1 to GMA10. The outputted gamma reference voltages GMA1 to GMA10 are inputted to the gamma buffer 203, and then inputted to a plurality of amplifiers AMP1 to AMP10 of the gamma buffer 203. In the gamma buffer 203, the gamma reference voltages GMA1′ to GMA10′ are generated by stably amplifying and removing the noise from the gamma reference voltages GMA1 to GMA10 inputted from the amplifiers AMP1 to AMP10 of the gamma buffer 203. Subsequently, the stabilized gamma reference voltages GMA1′ to GMA10′ are output from the gamma buffer 203 and input to the data driver 21b. The data driver 21b outputs a liquid crystal driving voltage by changing R/G/B digital video signals to analog video signals using the gamma reference voltages GMA1′ to GMA10′. The liquid crystal driving voltage is applied to the data line D of the LCD panel 21 during every scanning of the liquid crystal display panel.
The related art LCD device has some disadvantages. For example, the voltage divided by the plurality of resistors R1 to R10 also serves as a gray voltage. As the gray voltage increases, the number of the resistors from R1 to RIO needs to increases. Also, accuracy of the resistors R1 to RIO must be very precise thereby increasing the fabrication cost. To address these problems, a method has been proposed for forming a ramp signal generator outputting a ramp signal having the gray voltage of a corresponding level, and obtaining the gray voltage by sampling the ramp signal outputted from the ramp signal generator.
FIG. 3 is a waveform of a ramp signal output from a ramp signal generation circuit according to the related art. As shown in FIG. 3, the ramp signal output from the ramp signal generator is comprised of a plurality of gray voltages that are increase by steps. Accordingly, the ramp signal input to the data driver is sampled as the specific gray voltage, and then outputs a gray voltage. That is, the data driver counts the input video data according to the data size, and samples the ramp signal at a timing point that is at the completion of the count, thereby outputting the gray voltage to the video data.
The related art ramp signal generator has the following disadvantages. A ramp signal supply line provided between the ramp signal generator and the data driver, whereby the ramp signal outputted from the ramp signal generator is transmitted to the data driver. Accordingly, as resolution of the LCD panel becomes high, the length of the ramp signal supply line increases, thereby increasing the resistance and the capacitance of the ramp signal supply line. Thus, the ramp signal transmitted through the ramp signal supply line has a distorted waveform.
FIG. 4 is a waveform for explaining distortion of the ramp signal according to the related art. As shown in FIG. 3, the ramp signal generator outputs the plurality of gray voltages that increase by steps. FIG. 4 also shows the ramp signal generator output of gray voltages increasing by steps as a dotted line. However, as the ramp signal travels from the ramp signal generation circuit, the waveform of the ramp signal is distorted due to the resistance and the parasitic capacitance of the ramp signal supply line so as to arrive at the data driver having the shape shown as a solid line in FIG. 4. Accordingly, the voltages sampled by the data driver falls down Vd as compared with a desired voltage, as shown in FIG. 4. This degradation of the ramp signal degrades the picture quality of the LCD panel.